Software Fault Tolerance Using Dynamically Reconfigurable FPGAs

An emerging class of Field-Programmable Gate Arrays (FPGAs) permits partial reconnguration of the device without disturbing the rest of the array { even while the device is operating. Dynamic device reconnguration allows novel approaches to the migration of algorithms from software to hardware. New simulation tools are required in order to fully exploit the FPGA's versatility. We demonstrate how FPGA cells can be programmed and reprogrammed to provide a virtual FPGA that is much larger than the physical FPGA. In the context of dependable computing, our FPGA-based approach shows promise of signiicant performance gains over traditional software-intensive approaches. We apply this capability to the enhancement of software fault tolerance.